The internal SD card slot has been working for ages, but we never managed to get the external one working when we had the sprint to bring the MEGA65 R2 board up last year. So I am trying to finally fix this.
It's been an interesting problem, with a few unexpected things.
First, I had to understand how the microSD card interface and MAX10 JTAG interface share the microSD connector. Trenz designed it this way, so that if you hold the reset button in on the side of the MEGA65, you can connect a JTAG breakout into the microSD slot in order to programme the MAX10 FPGA.
Initially I thought that I had to manually direct the pins, or control the JTAG enable pin. However, it turned out a bit simpler: The MAX10 JTAG pins and the main Xilinx FPGA microSD card pins are just both connected in parallel on the microSD connector. This means if one device tri-states the lines, the other can control it.
However, it wasn't exactly that simple, as it still didn't work. Looking closer, a couple of the microSD slot lines are connected not to the MAX10's JTAG interface, but to some other IO lines. This meant that the MAX10 was trying to drive those lines, in particular the Card Select line, high, regardless of what the Xilinx FPGA was doing. I realised that this had to be the case when I found that increasing the drive strength of the Xilinx FPGA on this pin to 24mA enabled it to be controlled. But this is not a great solution, as it means that almost 100mW of extra power is being disipated through the cross-driving, and it could eventually damage something.
So this meant adjusting the program for the MAX10 FPGA to tri-state the pin in question. The change was only one line, to set the line to input. However, it has been ages since I have programmed the MAX10 FPGA, and it took me a few hours of trying things to remember that I had to run jtagd as root before running the program.sh or flash.sh scripts in https://github.com/MEGA65/mega65-r2-max10. I've now added those commands into the scripts, so that I don't have to remember this in future.
I also got tripped up by the fact that the Xilinx FPGA tells the MAX10 to reconfigure during its startup process, which meant that my updated bitstream was getting thrown away without me noticing. This was fine, once I realised it, as all I had to do was flash the new bitstream into place.
At this point, I could again control the Card Select line without having to overdrive the line. However, the SD card interface was still not working. Probing with the oscilloscope revealed that the clock pin was not being driven. Digging through, it looks like I made the SD card interface switching logic to assume a common clock for both SD card busses, but never actually tied them together. So I fixed this by making the clock on the correct bus toggle, instead of having them both toggle all the time. Again the changes were relatively small.
So now its the waiting game again, while I resynthesise the design, in the hope that it will all work. But even if it doesn't work immediately, I am feeling much more confident, as I have a good understanding of all of the relevant parts.
Two more problems remained: The Chip Select line wasn't being driven, and there were some related "signal plumbing" problems, that prevented things from working.
Now, finally, it is possible to run a MEGA65 from the external microSD card slot!
Obligatory photos showing the MEGA65 booting from the external microSD card: