So, we have had HDMI-compatible video output working for some time. We even have the audio working on many monitors, but not all. There is something fishy with the audio output of the ADV7511 driver, when using certain TVs, monitors and HDMI capture devices. The symptom is either no audio, or no
…Making a C64/C65 compatible computer
Making a C64/C65 compatible computer Hier sind die Blogs von Dr. Paul Stephen-Gardner zum MEGA65 Projekt!
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This short post is really one for the folks out there pulling their hair out with FPGA development in general, rather than the MEGA65 specifically.
I have had errors like the following a few times, and it always takes me a while to remember what the cause is:
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ERROR: [Synth 8-2396] near character -
I'm continuing to work on creating a tool to write updated bitstreams (or "cores", or whatever you like to call the things that turn an FPGA into an interesting computer
Here's what it looks like after I got it working:
But let's go back to the beginning...
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In a recent post, I confirmed that -
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The internal SD card slot has been working for ages, but we never managed to get the external one working when we had the sprint to bring the MEGA65 R2 board up last year. So I am trying to finally fix this.
It's been an interesting problem, with a few unexpected things.
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First, I had to -
As many reading will know, the German arm of the project has been running a fund raiser since mid-October last year, with the goal of funding the manufacture of the injection-moulding tooling to build the cases for the MEGA65.
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The main concerns that people raised about this, was that it was rather -
I am getting closer to being able to communicate with the QSPI flash, so that we can have the MEGA65 update its own bitstreams in the field. To recap the current situation:
1. Most of the signals to the flash are easy to connect to with the QSPI flash, except the clock, which is normally driven
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The MEGA65 is based on an FPGA. FPGAs are like a blank canvas that you load a hardware design into, with that design being typically stored in flash memory. Generally you don't notice this, because the whole process of loading the design into the FPGA and starting it, takes only about 0.3
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